Invited Lecture at the FPGA Community of Interest Meeting

Jonathan Graf will be giving a talk, “Synthesis Flow Integrity and Reproducibility via Trace,” to a meeting of USC, DoD, and DIB members of the FPGA community. The lecture will emphasize the importance and usefulness of our Trace product in EDA tools. Carlton Fraley, Steven Frederiksen, and Scott Harper have contributed to the lecture but will not be able to attend in person.

Graf Research Corporation to present at NAECON

Graf Research Corporation will head to the IEEE National Aerospace and Electronics Conference in Fairborn, OH, to present our paper “Hardware Trojan Detection using Xilinx Vivado.” Paper contributors include Ryan Marlow, Scott Harper, Whitney Batchelor, and Jon Graf. Ryan Marlow will be the presenter.

-----

Hardware Trojan Detection using Xilinx Vivado

Ryan Marlow, Scott Harper, Whitney Batchelor, Jonathan Graf

Abstract: Modern commercial EDA tools provide end users with a framework for application specific customizations through a general-purpose programming language interface to an underlying circuit object model. Xilinx Vivado exposes that information through Tcl. This work demonstrates an implementation of a static hardware detection algorithm utilizing this interface of Vivado.

Research Award: Custom FPGA EDA Tools

Graf Research has been awarded funding to develop custom electronic design automation (EDA) software for Field Programmable Gate Arrays.