IEEE PAINE 2026 Poster Session
Graf Research’s James Koiner will be presenting his poster “Composing HTH Benchmarks for Evaluating Bitstream-level Detection Methods” at IEEE International Conference on Physical Assurance and Inspection of Electronics (PAINE) on October 27th from 4:30-5:30pm in Phoenix, Arizona.
IEEE International Conference on Physical Assurance and Inspection of Electronics (PAINE)
This poster provides a more in-depth look at the composition of Hardware Trojan Horse (HTH) benchmarks and the evaluation of detection methods using Bitstream Equivalence Checking with our Enverité PV-Bit technology, the World's Only Bitstream Equivalence Checker.
Interested in our research or Enverité software capabilities? Please reach out here or email us at info@enverite.com!
Composing HTH Benchmarks for Evaluating Bitstream-level Detection Methods
By: Freya Archuleta, James Koiner, Ali Asgar Sohanghpurwala, Whitney Batchelor, Jonathan Graf, Scott Harper
Contact info@grafresearch.com for more information.
Abstract— Assurance testing for critical FPGA designs includes verifying the absence of Hardware Trojan Horse (HTH) circuits inserted directly into bitstreams, bypassing established netlist-level countermeasures. Bitstream Equivalence Checking (BEC) tests whether the bitstream is physically and logically equivalent to a trusted netlist verified with established methods. This work presents the methodology for developing a benchmark set that composes a diverse array of exploited bitstreams with simulated bitstream-level HTH insertion from a library of independent trigger, payload, and golden circuit designs. The efficacy of a BEC tool in detecting HTH insertions is then evaluated against the benchmark set.
Keywords—Hardware Trojan Horse, Countermeasure,Bitstream Equivalence Checking, Benchmark, Trust, Assurance, FPGA