Graf Research is proud to announce our return to the 2025 SEE/MAPLD Conference, taking place May 12-16, 2025, in San Diego, California. As in years past, SEE/MAPLD brings together experts in the fields of radiation effects, microelectronics, FPGA design, and embedded systems.
At this year's conference, Graf Research will demonstrate Enverite PV-Bit verification and our Benches platform. Enverite PV-Bit verification ensures that the design contained in the FPGA bitstream is logically and physically equivalent to the netlist design. Enverite PV-Bit enhances the safety, security, and design integrity in mission-critical FPGA systems. Benches is our laboratory management platform that is designed for conducting complex experiments with a variety of lab equipment. Benches provides a flexible framework for testing the reliability of heterogeneous SoC-based systems under fault conditions.
We welcome all attendees to visit our booth to learn how Graf Research is advancing the security and assurance of programmable systems in the most demanding environments. For full conference details and registration, visit the SEE/MAPLD 2025 website.