We're excited to share that Scott Harper, PhD, will participate in the DAC 2026 panel “From RTL to Reality: Building Security into the Silicon Lifecycle” on Monday, July 27, from 2:00 to 2:45 PM PDT at the DAC Pavilion.
The panel will examine how security can be established and maintained throughout the silicon lifecycle, from architecture and RTL design through verification, implementation, manufacturing, deployment, and post-deployment assurance.
Scott will contribute Graf Research’s perspective on verification and assurance for FPGA-based systems, an area closely related to the work behind our Enverité EDA tool.
If you're attending DAC, we hope you'll join the discussion and connect with Scott during the conference.