Patents
2025
E. Carlisle IV, J. Graf, S. Harper, S. Frederiksen, "Computer-implemented Verification of a Hardware Design Implementation Against a Natural Language Description of the Hardware Design or Software Code Against a Natural Language Description of a Software Application," U.S. Patent US 12,423,503 B2, Sep 23, 2025. Link to patent.
2024
A.A. Sohanghpurwala, S. Harper, J. Graf, C. Fraley, A. Cook, T. Dunham, “Computer Technology to Ensure an Electronic Design Automation (EDA) Implementation for Electronic Circuitry is Traceable, Auditable, and Reproducible,” U.S. patent US 12,166,909 B2, Dec 10, 2024. Link to patent.
2022
J. Graf, A.A. Sohanghpurwala, S. Harper, “Verification of Bitstreams,” U.S. Patent US 11,531,773 B2, Dec 20, 2022. Link to patent.
2021
J. Graf, A.A. Sohanghpurwala, S. Harper, “Private Verification for FPGA Bitstreams,” US Patent US 10,902,132 B2, Jan 26, 2021. Link to patent.